Build an IDT (INTERRUPT DESCRIPTOR TABLE) assembly AT&T intel 32 bits?

Up vote 0 down vote favorite share g+ share fb share tw.

I try to build an IDT, after sti execution, the code crashes! I have an error message : SingleStep CPU1 Error : Processor Running Remark: I use micro Atom with eclipse Helios, the assembly is AT&T /** *********** New code *********/ New code after I found that the BIOS puts the atom in the protected mode (CR0. PE = 1) and generates IDT/GDT : The idea is just to use an ISR with APIC timer.

/*Change the address of idt_entries table */ fill_interrupt(ISR_Nbr,(unsigned int) isr33, 0x08, 0x8E); static void fill_interrupt(unsigned char num, unsigned int base, unsigned short sel, unsigned char flags) { unsigned short *Interrupt_Address; /*address = idt_ptr. Base + num * 8 byte*/ Interrupt_Address = (unsigned short *)(idt_ptr. Base + num*8); *(Interrupt_Address) = base&0xFFFF; *(Interrupt_Address+1) = sel; *(Interrupt_Address+2) = (flags>16)&0xFFFF; } /*********************End new code *********************/ idt_flush: push %ebp //save the context to swith back mov %esp,%ebp cli mov $idt_ptr, %eax //Get the pointer to the IDT, passed as parameter lidt (%eax) //Load the IDT pointer sti pop %ebp //Return to the calling function ret What is wrong?

See the rest of the code: isr33: push %ebp //save the context to swith back mov %esp,%ebp pop %ebp //Return to the calling function ret static void init_idt() { int iIndex; //Link the IDTR to IDT idt_ptr. Limit = sizeof(idt_entry_t)*256-1; idt_ptr. Base = (unsigned int)&idt_entries; idt_set_gate(0,(unsigned int) isr0, 0x00, 0xEE); for ( iIndex=1; iIndex>16)&0xFFFF; idt_entriesnum.

Sel = sel; idt_entriesnum. Always0 = 0; idt_entriesnum. Flags = flags; } //IDT struct idt_entry_struct { unsigned short base_lo; unsigned short sel; unsigned char always0; unsigned char flags; unsigned short base_hi; }__attribute__((packed)); typedef struct idt_entry_struct idt_entry_t; //IDT register struct idt_ptr_struct { unsigned short limit; unsigned int base; }__attribute__((packed)); typedef struct idt_ptr_struct idt_ptr_t; //ISR number int ISR_Nbr = 33; assembly link|improve this question edited Oct 5 '11 at 19:58 asked Sep 30 '11 at 21:22mustapha367 100% accept rate.

1 We're going to need a bit more code than that. What does your actual IDT look like? Have you checked out wiki.osdev.org/IDT it's very helpful – Earlz Sep 30 '11 at 21:27 @Earlz: I've just add the rest of the code.

– mustapha Oct 1 '11 at 1:42.

I don't remember the details (and am too lazy to check the documentation at the moment), but set your access byte in IDT entries to 0x8E, not 0 or 0xEE. That should work. You can make it more complex later.

Finally, is isr33() a C function or assembly function? Does it save and restore segment registers and general-purpose registers? Show us the function.

Don't enable interrupts yet. First make sure that your isr33 functions properly when invoked through INT 33. Why?

Having seen the above, I anticipate issues with the PIC configuration and handling and any hardware interrupt can just crash your code if the PIC is not programmed correctly.

The only difference between 0xEE and 0x8E is that 0xEE can be called from ring 3. Setting it to 0 would disable the interrupt. But the selector value should definitely not be 0, it needs to be a code segment.

– ughoavgfhw Oct 1 '11 at 4:55 @Alex:--------1) I set the IDT0 to 31 to zero because I don't need them (I work on evaluation board Atom-32bits not on PC) --------2)I put the ISR33 is assembly, The code rigth now crushes juste after STI, ii doesn't even point to ISR33 --------3)what do you mean by PIC? I thought is just about IDT IDTR and ISR ... – mustapha Oct 2 '11 at 0:29 @ughoavgfhw: Because I am working on Atom-Intel-32bits the mode is a Protected mode so no code segment is needed right? – mustapha Oct 2 '11 at 0:33 @mustapha: PIC = Programmable Interrupt Controller.

There must be something, even if it's not a PIC, but LAPIC or LAPIC+something. I mean, the board is pretty much useless if the CPU can't get interrupts from other devices. IDT 0 through 31 are reserved for exceptions.

Your code is crashing without giving you any clues precisely because you don't set up exception handlers. If you had them, you'd be able to see more (exception number and code, instruction that caused it, interrupt number). Anyway, if interrupts are disabled, can you successfully (w/o crashing/hanging) invoke isr33() with INT33?

– Alex Oct 2 '11 at 1:16 @Alex : -----1)I don't get your point about the APIC? (Why I have to worry about the external interrupt) ------2)you are right I sort of crash the IDT0 to IDT31, but I m making a new IDT there is no soft on the board (except my code and the MicroC OS) ------3)I will do the test about the disable interrupt and Int 33. – mustapha Oct 2 '11 at 2:47.

Resolved, As I use a N450 Atom board, it has already a BIOS, the BIOS makes the IDT and GDT, all I have to do it is just to now where they are by reading thier adressess with : sidt (for IDT) and sgdt (for GDT).

I cant really gove you an answer,but what I can give you is a way to a solution, that is you have to find the anglde that you relate to or peaks your interest. A good paper is one that people get drawn into because it reaches them ln some way.As for me WW11 to me, I think of the holocaust and the effect it had on the survivors, their families and those who stood by and did nothing until it was too late.