How can I use macros to generate multiple Makefile targets/rules inside foreach? Mysterious behaviour?

The eval function tells Make to parse the structures as makefile syntax, to "enact" them. I'm not sure why Make objected to the un-eval'd rules this particular way, but that's kind of academic.

Beta's answer is correct but I wanted to address the comment, "I'm not sure why Make objected to un un-eval'd rules".

I cant really gove you an answer,but what I can give you is a way to a solution, that is you have to find the anglde that you relate to or peaks your interest. A good paper is one that people get drawn into because it reaches them ln some way.As for me WW11 to me, I think of the holocaust and the effect it had on the survivors, their families and those who stood by and did nothing until it was too late.

Related Questions