I think you are confused about how compiler puts things together. When you use c flag, i.e. No linking is done, the input is C++ code, and the output is object code.
The o files thus don't mix with c and compiler warns you about that. Symbols from object file are not moved to other object files like that.
I think you are confused about how compiler puts things together. When you use -c flag, i.e. No linking is done, the input is C++ code, and the output is object code.
The . O files thus don't mix with -c, and compiler warns you about that. Symbols from object file are not moved to other object files like that.
All object files should be on the final linker invocation, which is not the case here, so linker (called via g++ front-end) complains about missing symbols. Here's a small example (calling g++ explicitly for clarity): PROG? = myprog OBJS = worker.
O main. O all: $(PROG) .cpp. O: g++ -Wall -pedantic -ggdb -O2 -c -o $@ $You might also want to look at the -M gcc option for building make rules.
Gen1 has no direct dependancies with str2num str2cmd or tokenizer – Oxinabox Mar 7 '10 at 4:39 You compile each . Cpp file individually, then link all resulting . O files together.
I added a simple make example. – Nikolai N Fetissov Mar 7 '10 at 4:44 Forgot to mention - manage dependencies via header files, not object files. – Nikolai N Fetissov Mar 7 '10 at 4:45 I'm having trouble followign your example.
I've never seen $@, @O rule tells make how to build a file with . O suffix out of corresponding file with . Cpp suffix (say, how to produce main.
O out of main. Cpp) The $O) These are builtin variables of make. – Nikolai N Fetissov Mar 7 '10 at 5:14.
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