Virtex BEL constraints--do they really do anything?

24812: 00/08/19: Re: Xilinx Student Edition Floorplanning 24830: 00/08/20: Re: Further FPGA metastability questions 24860: 00/08/21: Re: Metastability and antifuze 24861: 00/08/21: Re: Further FPGA metastability questions 24862: 00/08/21: Re: timing simulation vs functional one 24866: 00/08/21: Re: Further FPGA metastability questions 24867: 00/08/21: Re: Metastability measurement 24887: 00/08/21: Looks like Xilinx is at it again! 24897: 00/08/21: Re: Usage of ROC (Foundation 2.1i) 24898: 00/08/21: Re: timing simulation vs functional one 24899: 00/08/21: Re: Looks like Xilinx is at it again! 24900: 00/08/21: Re: Looks like Xilinx is at it again!

24905: 00/08/21: Re: Looks like Xilinx is at it again! 24906: 00/08/22: Re: Verilog multiplier in Xilinx... 24945: 00/08/23: Re: Looks like Xilinx is at it again! 24975: 00/08/23: Re: create a RAM in a Virtex 24977: 00/08/23: Re: timing simulation vs functional one 25007: 00/08/23: Re: run time doubled with Xilinx 3.1i upgrade 25012: 00/08/23: ... more.

I cant really gove you an answer,but what I can give you is a way to a solution, that is you have to find the anglde that you relate to or peaks your interest. A good paper is one that people get drawn into because it reaches them ln some way.As for me WW11 to me, I think of the holocaust and the effect it had on the survivors, their families and those who stood by and did nothing until it was too late.