If a register (e.g. R4) happens to hold the proper magic constant (1 shifted left by the desired left-rotate amount) I think one can do it in two instructions.
If a register (e.g. R4) happens to hold the proper magic constant (1 shifted left by the desired left-rotate amount) I think one can do it in two instructions: umull r3,r2,r1,r4 umlal r2,r3,r0,r4 Slower than using four single-cycle instructions, but even if one has to load r4 with the proper constant it's still more compact than the four-instruction methods.
Thanks, as one can set up the correct value in r4 in one command, this answers my question! But - as you guessed - I was looking for a more efficient version, so I'll wait for maybe a week hoping for a three-commands-in-three-cycles-solution before accepting your answer. – Whoever Mar 30 at 12:00 You need to chop off and assemble four partial words, and none of the ARM7-TDMI instructions except for the multiplies can write to, nor apply a shift to, more than one register.
– supercat Mar 30 at 14:39 I don't have much hope in the existence of a three-commands-in-three-cycles solutions either. But one never knows. Maybe there is a magic first command which allows to finish off the problem with the next two commands.
– Whoever Mar 31 at 8:17.
If there is a solution to this, gcc also doesn't recognize it: unsigned long long int reg64 = random_value; unsigned int n = shift_value; reg64 = (reg64 >> (n%64)) | (reg64.
Thanks for trying out the gcc. The fact that it needs four commands for n=33 (instead of using the formula for n=1 with R0 and R1 exchanged) shows that is not very optimized for rotating 64-bit integers in ARM. – Whoever Mar 29 at 8:53 In general, the ARM ISA is very hard for compilers.It's meant for use by humans.
– ninjalj Mar 29 at 18:30 @ninjalj: I'd guess that some human hard-coded the special cases n=1 and n=63 in the gcc. – Whoever Mar 30 at 8:46.
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