MIPS Assembly strange jump?

The add instruction is occurring in the branch delay slot of the beq.

– user472875 Nov 7 '10 at 0:15 @user472875: Try putting a nop instruction after the beq. Disclaimer: I'm not familiar with MIPS assembler; it's possible that my answer is not correct (in the sense that the assembler may automatically put nops in for you), in which case something else is the problem. – Oli Charlesworth Nov 7 '10 at 0:18 1 Some assemblers (e.g. GNU as) can pretend that there is no branch delay slot: add a .

Set reorder directive and let the assembler move the instructions a bit or add a nop where necessary. – Thomas Pornin Nov 7 '10 at 0:21 No, I unchecked 'delayed branches' in the simulator settings and it stopped happening. I guess a nop would fix it as well.

This seems very strange to me, almost like a bug, why are branch delays used to begin with? -> Never mind, just read the Wiki article more thoroughly – user472875 Nov 7 '10 at 0:22 2 @user472875: They're a side-effect of a pipelined CPU. By the time the CPU realises that it has to branch, it has already loaded the next instruction, and so has to execute it.

– Oli Charlesworth Nov 7 '10 at 0:24.

(The and after the first beq will always be executed, too. ) MIPS has explicit pipeline hazards; by the time the decision to branch (or not) is made, the following instruction has already progressed far enough through the instruction pipeline that it will be executed regardless. This is known as the "branch delay slot".

In some cases you can arrange code to take advantage of this; if you can't (or don't want to), you can just put a nop in the following instruction. Some assemblers will reorder code (or fill in the nop) for you - e.g. Gas, the GNU assembler, does, unless you tell it not to with a . Set noreorder directive.

But you still need to be aware of it when disassembling anyway. If you're writing code without automatic reordering by the assembler, I recommend annotating the delay slot with some extra indentation to make it stand out: lop: beq $3, $0, end2 nop and $2, $3, $4 sll $3, $3, 1 beq $2, $0, lop nop addi $8, $8, 1 j lop.

1 I hadn't realized the Linux kernel uses a 1-space indent for insns on branch delay slots. – ninjalj Nov 9 '10 at 22:50.

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