Write to a cacheable physical address in linux kernel without using ioremap or mmap?

The simplest way to do this would be to do kmalloc() to get some memory in the kernel. Then you can get the physical address of the pointer that returns by passing it to virt_to_phys() . This is a total hack but for your case of debugging / tracing under qemu, it should work fine.

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I am changing the linux kernel scheduler to print the pid of the next process in a known physical memory location. Mmap is used for userspace programs while I read that ioremap marks the page as non-cacheable which would slowdown the execution of the program. I would like a fast way to write to a known physical memory.

Phys_to_virt is the option that I think is feasible. Any idea for a different technique. PS: I am running this linux kernel on top of qemu.

The physical address will be used by qemu to read information sent by guest kernel. Writing to a known io-port is not feasible since the device code backing this io-device will be called every time there is an access to the device. EDIT : I want the physical address location of the pid to be safe.

How can I make sure that a physical address that the kernel is using is not being assigned to any process. As far as my knowledge goes, ioremap would mark the page as cacheable and would hence not be of great use. Linux memory-management linux-kernel link|improve this question edited Feb 8 at 18:19 asked Feb 8 at 12:51prathmesh.

Kallurkar18319 60% accept rate.

The simplest way to do this would be to do kmalloc() to get some memory in the kernel. Then you can get the physical address of the pointer that returns by passing it to virt_to_phys(). This is a total hack but for your case of debugging / tracing under qemu, it should work fine.

EDIT: I misunderstood the question. If you want to use a specific physical address, there are a couple of things you could do. Maybe the cleanest thing to do would be to modify the e820 map that qemu passes in to mark the RAM page as reserved, and then the kernel won't use it.

(ie the same way that ACPI tables are passed in). If you don't want to modify qemu, you could also modify the early kernel startup (around arch/x86/kernel/setup. C probably) to do reserve_bootmem() on the specific physical page you want to protect from being used.

To actually use the specified physical address, you can just use ioremap_cache() the same way the ACPI drivers access their tables.

But the kmalloc does not give me the same physical address always. In qemu, I am assuming a known physical address. I can still use your solution if I can somehow communicate the physical address of the pid to the qemu using an emulated io device.

Can you suggest me a method of using a known physical address. Some thing like kmalloc/reserve(physical address)? – prathmesh.

Kallurkar Feb 9 at 9:47 see my edited answer... – Roland Feb 9 at 18:03.

It seems I misunderstood the cache coherency between VM and host part, here is an updated answer. What you want is "virtual adress in VM" "virtual or physical adress in QEMU adress space". Then you can either kmalloc it, but it may vary from instance to instance, or simply declare a global variable in the kernel.

Then virt_to_phys would give you access to the physical address in VM space, and I suppose you can translate this in a QEMU adress space. What do you mean by "a physical address that the kernel is using is not assigned to any process? " You are afraid the page conatining your variable might be swapped?

Kmalloced memory is not swappable Original (and wrong) answer If the adress where you want to write is in it's own page, I can't see how an ioremap of this page would slow down code executing in a different page. You need a cache flush anyway, and without SSE, I can't see how you can bypass the cache if MMU and cache are on. I can see only this two options : ioremap and declare a particular page non cacheable use a "normal" address, and manually do a cache flush each time you write.

Sorry, but I don't understand the use of cache flush here. I am running the linux guest on top of qemu-VMM. So it does not matter whether there is a flush or not.

– prathmesh. Kallurkar Feb 8 at 18:21 agree -- why would a cache flush be neded? If you're on x86 everything is cache coherent anyway.

– Roland Feb 8 at 19:17.

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